Die stacking and chip stacking

Today I saw a slashdot posting for a tear down of the iPhone. Besides being very interesting in general one thing struck me, and that was the main processor. Not only was this thought to be an ARM11 part, but it seems to have a 256 MB of SDRAM stacked in the same package. This reminds me of a tear down I saw for the Nokia 7280. This is a very similar idea except this time the memory stack is a separate chip from the processor. I have the paper copy of this article, and the picture shows the memory stack chip soldered directly on top of the processor. The memory stack in the 7280 is also from Samsung, but it includes 3 types of memory: NAND flash, NOR flash and SDRAM. Vertically stacking dies has become very important to reducing board area. I especially like the way the stack on the 7200 works because then the package for the processor can stay the same, but incremental advances in the memory stack can be made.

SOCs and open silicon

Traditionally processors have been built to only be a processor. In the PC world the processor has been directly connected to only the northbridge (Even this is changing e.g. AMDs integrated memory controller). This created a system where the northbridge and the southbridge would connect the processor to the outside world (ethernet, audio, video, keyboard etc…).

Enter the 8-bit embedded processor.

At the same time that x86 PCs were becoming wildly popular small 8-bit embedded microcontrollers were being used more frequently (such as the PIC). While these devices still have a processor the peripherals to interact with the outside world are built onto the chip (PWM, A/D, D/A, serial communication etc…). Notice that these embedded microcontrollers interact with the outside world in a very different way their PC counterparts.

Mixing of worlds

With the introduction of ARM processors we see several features that existed in the embedded microcontroller world as well as the x86 world. I know ARM9 processors are latter in the development of the ARM line, but I will use them as an example. From the x86 world ARM9 takes 32-bit operation and a MMU (to handle virtual memory). From the microcontroller world ARM9 takes integrated peripherals. ARM takes this one step further, they developed a standard on chip interconnect for peripherals the AHB (advanced highspeed bus) and the APB (advanced peripheral bus). Today we see many chip companies taking an ARM core and integrating it with their own cores, peripheral cores from ARM, and third party cores. This has developed a large ecosystem of ARM based SOCs. The processor/peripheral combination has become known as the SOC (System On Chip).

Other interesting SOCs.

I have talked a lot about ARM SOCs, but there are other SOCs that can run linux and have integrated peripherals. I have run into a few other very interesting SOCs. The first is Sun’s Niagara II processor. This so called server on chip, an 8-core SPARC processor, integrates several interesting peripherals including: dual 10 gigabit ethernet ports, PCI-E x8 and an integrated memory controller. Sun’s T1, the predecessor of Niagara II, was open sourced (Sun has not decided on wether to open source Niagara II). One company, Simply RISC, has taken the T1 stripped off many of the server features, reduced it to one core and added a wishbone interface. Wishbone is another on chip interconnect similar to AHB and APB. Simply RISC has named their processor the S1.

Future

I am interested in two trends here. The first is open source moving beyond software, and the second is creating even tighter integration in the SOC world. For example how about a SOC based on the S1 core that has an 802.11 radio next to it?